1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device and an apparatus for fabricating a semiconductor device.
2. Description of the Related Art
In installing a semiconductor device on a printed circuit board, the semiconductor device is encapsulated with resin or the like and the semiconductor device is protected from an external environment, in order to facilitate the handling of the semiconductor device. In mounting the encapsulated semiconductor device, electrodes formed both on the semiconductor device and the printed circuit board are connected to each other using a lead frame. In an early phase of development, the electrodes of the semiconductor device are connected to the lead frame through wires made of gold (Au) or the like. In doing so, it is necessary that the semiconductor device be brought close to the lead frame and placed thereon and space for routing wires be provided between them.
In order to satisfy market requirements for a reduction in the size of semiconductor devices together with requirements for high integration of these semiconductor devices, projecting terminals (in the following, referred to as bumps) are used instead of wire connections.
The term “bump” here means a terminal that is projected from the main surface of the semiconductor device, which is formed by laminating solder on the electrode of the semiconductor device; electrodes are connected to each other through this solder. More specifically, bumps are formed at predetermined positions on the front and rear surface of a plurality of semiconductor chips to be connected, and the bumps formed on the front surface of a semiconductor chip and the bumps formed on the rear surface of another semiconductor chip are aligned and compressed to each other for bonding. With this scheme, it is possible to stack and electrically connect a plurality of semiconductor chips to each other without using wires. According to this connection method using bumps, it is possible that a lead frame is laid on a semiconductor device and the lead frame and the semiconductor device are electrically connected to each other. Thus, space can be saved, and this method is effective for reducing the size of the semiconductor device.
In the forming of bumps, one method that is typical is one in which the electrodes are formed on the semiconductor device and the solder is then plated thereon. However, projections and depressions are formed on the surface of the solder formed by plating, and air bubbles are caught in the depressions which cause a reduction in connection strength if the bumps are connected to the lead frame as they are. In order to prevent this, heat treatment is performed such that solder is heated at a temperature above its melting point to smooth the solder surface before connecting the bumps to the lead frame. In the following, this heat treatment is referred to as reflow.
Various schemes are disclosed concerning reflow. For example, JP11-163036A discloses a method of using radiant heat emitted from a halogen lamp. JP2004-6818A and JP2001-58259A disclose methods performed with conductive heat using a heater.
However, methods using a halogen lamp for a heat source like the method in JP11-163036A separately need a reflecting mirror or a reflector in addition to the lamp, so that there is a problem in that the configuration of a fabrication apparatus becomes complicated.
In the methods disclosed in JP2004-6818A and JP2001-58259A, because a wafer on which semiconductor devices are formed comes into direct contact with the heater, some portions of the wafer come into contact with the heater and some do not come into contact with the heater if there is warpage or the like on the wafer. In this case, variations occur in heating semiconductor devices, causing a problem in that solder cannot be smoothed. In addition, JP2007-294990A discloses a technique concerning an ashing method for a photoresist.